Apparatus having segmented data lines and methods of their operation

A memory, comprising:

• an array of memory cells;
• a data line selectively connected to a plurality of memory cells of the array of memory cells, wherein the data line comprises a first data line segment corresponding to a first subset of memory cells of the plurality of memory cells and a second data line segment corresponding to a second subset of memory cells of the plurality of memory cells, and wherein the second data line segment is selectively connected to the first data line segment through a switch;
• a first page buffer selectively connected to the first data line segment, and further selectively connected to the second data line segment through the first data line segment and the switch;
• and
• a second page buffer selectively connected to the second data line segment.

A memory, comprising:

• an array of memory cells;
• a data line selectively connected to a plurality of memory cells of the array of memory cells, wherein the data line comprises a first data line segment corresponding to a first subset of memory cells of the plurality of memory cells, a second data line segment corresponding to a second subset of memory cells of the plurality of memory cells, and a third data line segment corresponding to a third subset of memory cells of the plurality of memory cells;
• a first page buffer selectively connected to the first data line segment;
• a second page buffer selectively connected to the second data line segment;
• and
• a third page buffer selectively connected to the third data line segment;
• wherein the second data line segment is selectively connected to the first data line segment through a first switch;
• wherein the third data line segment is selectively connected to the second data line segment through a second switch;
• and
• wherein the first data line segment, the first switch, the second data line segment, the second switch, and the third data line segment are connected in series.