Abrupt shutdown and abrupt power loss management
AssigneeMicron Technology, Inc.
InventorMarco Redaelli
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AssigneeMicron Technology, Inc.
InventorMarco Redaelli
Estimating the term…
Implementations described herein relate to abrupt shutdown and abrupt power loss management. In some implementations, a memory device may receive a reset signal and may perform an abrupt shutdown operation based on receiving the reset signal. For example, the memory device may perform a cache flush and a write protect operation. In some other implementations, the memory device may receive a reset signal and may perform an abrupt power loss operation based on receiving the reset signal. For example, the memory device may perform a write protect operation and a flash translation layer stand-by operation. The memory device may initiate a reduced power consumption state of the memory device based on a completion of the abrupt shutdown operation or the abrupt power loss operation.
A memory device, comprising:
An apparatus, comprising:
A method, comprising:
Dependencies are inferred from the claim text.