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US 12,598,780 B2Granted
Gate-all-around transistors with hybrid orientation
AssigneeInternational Business Machines Corporation
InventorsNicolas Jean Loubet, Shogo Mochizuki, Maruf Amin Bhuiyan
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Abstract
A semiconductor device includes a p-type field-effect transistor including first channels made of silicon having a (110) crystallographic orientation. The semiconductor device further includes an n-type field-effect transistor including second channels made of silicon having a (100) crystallographic orientation. The semiconductor device further includes a gate surrounding the first channels and the second channels.
Claims12
A semiconductor device, comprising:
- a shared semiconductor substrate having a (110) crystallographic orientation;
- a gate all around (GAA) p-type field-effect transistor including first channels made of silicon having a (110) crystallographic orientation;
- a GAA n-type field-effect transistor including second channels made of silicon having a (100) crystallographic orientation;
- a first gate surrounding the first channels;
- a second gate surrounding the second channels;
- a silicon oxide layer comprising a first bonding oxide layer directly connected to the shared semiconductor substrate and a second bonding oxide layer directly connected to a bottom surface of the second gate, wherein the first bonding oxide layer is directly connected to the second bonding oxide layer and wherein a bonding interface exists between the first bonding oxide layer and the second bonding oxide layer;
- and
- a bottom dielectric isolation (BDI) layer directly connected to a bottom surface of the first gate and directly connected to the shared semiconductor substrate, wherein the BDI layer is composed of a different dielectric material than the silicon oxide layer.
5 more elements
A semiconductor device, comprising:
- a shared semiconductor substrate having a (100) crystallographic orientation;
- a first gate all around (GAA) transistor over the shared semiconductor substrate, the first GAA transistor comprising first channels having a (100) crystallographic orientation;
- a second GAA transistor over the shared semiconductor substrate, the second GAA transistor including second channels having a (110) crystallographic orientation;
- a first gate surrounding the first channels;
- a second gate surrounding the second channels;
- a silicon oxide layer comprising a first bonding oxide layer directly connected to the shared semiconductor substrate and a second bonding oxide layer directly connected to a bottom surface of the second gate, wherein the first bonding oxide layer is directly connected to the second bonding oxide layer and wherein a bonding interface exists between the first bonding oxide layer and the second bonding oxide layer;
- and
- a bottom dielectric isolation (BDI) layer directly connected to a bottom surface of the second gate and directly connected to the shared semiconductor substrate, wherein the BDI layer is composed of a different dielectric material than the silicon oxide layer.
5 more elements
Dependencies are inferred from the claim text.