Precision timing across PCIe CEM NICS

A device, comprising:

• a network interface card (NIC) that is compliant with a peripheral component interconnect express (PCIe) card electromechanical (CEM) specification, wherein the NIC comprises:
• a group of pins that are configured according to a defined specification;
• an NIC timing synchronization circuit;
• and
• an electrically erasable programmable read-only memory comprising a record that specifies functionality of the group of pins according to a precision timing synchronization mode,
• wherein the record specifies a dual active mode that uses the group of pins to support universal serial bus functions and the precision timing synchronization mode concurrently.

A method, comprising:

• in response to interfacing with a network interface card (NIC) that is compliant with a peripheral component interconnect express (PCIe) card electromechanical (CEM) specification, determining, by a device comprising at least one processor, that the NIC supports a precision timing synchronization operation mode;
• instructing, by the device, the NIC to utilize a group of pins specified according to a joint test action group (JTAG) specification to perform a precision timing synchronization procedure;
• and
• synchronizing, by the device via the group of pins, a card time synchronization circuit of the NIC with a board time synchronization circuit of a server motherboard according to the precision timing synchronization procedure.