Asymmetric encoding schemes

A transmitting device, comprising:

• one or more memories storing processor-executable code;
• and
• one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the transmitting device to:
• encode a first subset of bits of a total set of bits that are configured for encoding a fixed point complex data set that comprises a real portion and an imaginary portion, wherein the first subset of bits indicates a quantity of redundant sign bits that are redundant for the real portion and the imaginary portion, and wherein a quantity of the first subset of bits is based at least in part on a compression encoding scheme;
• encode a second subset of bits of the total set of bits, wherein a first portion of the second subset of bits indicates the real portion of the fixed point complex data set and a second portion of the second subset of bits indicates the imaginary portion of the fixed point complex data set, and wherein a first quantity of bits of the first portion is different from a second quantity of bits of the second portion based at least in part on the quantity of the first subset of bits being an odd integer value in accordance with the compression encoding scheme;
• and
• transmit a message comprising the total set of bits.