Memory device with reformed insulating layer and method of fabricating the same

A method of fabricating a memory device, comprising:

• forming a first conductive layer on a dielectric substrate;
• forming a stacked structure on the first conductive layer, wherein the stacked structure includes a plurality of intermediate layers and a plurality of insulating layers stacked alternately;
• forming a channel pillar extending through the stacked structure and the first conductive layer;
• forming a plurality of conductive pillars electrically connected to the channel pillar within the channel pillar;
• forming a slit trench extending through the stacked structure and the first conductive layer;
• removing portions of the first conductive layer, the channel pillar and the plurality of conductive pillars to form a first horizontal opening;
• partially removing the plurality of intermediate layers to form a plurality of second horizontal openings;
• forming a charge storage layer in the first horizontal opening and the plurality of second horizontal openings;
• forming a plurality of second conductive layers in the plurality of second horizontal openings, wherein the charge storage structure is located between the plurality of second conductive layers and the channel pillar;
• and
• forming a body part of a slit in the slit trench, and an extension part of the slit in the first horizontal opening, wherein the extension part is connected with the body part and located between the stacked structure and the dielectric substrate, and the charge storage structure further covers the extension part.