Memory device and method for forming the same
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
InventorsHsin-Cheng Lin, Tao Chou, Chee-Wee Liu
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AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
InventorsHsin-Cheng Lin, Tao Chou, Chee-Wee Liu
Estimating the term…
A memory device includes a first pull-down transistor, a first pass-gate transistor, a second pull-down transistor, a second pass-gate transistor, a first pull-up transistor, and a second pull-up transistor. A first power line, a first bit line, and a second bit line is provided, the first power line includes first and second portions separated from each other, wherein in a cross-sectional view, the second portion of the first power line is laterally between the first and second bit lines along a direction. A first via electrically connects the first portion of the first power line to the first pull-down transistor. A second via electrically connects the first bit line to the first pass-gate transistor. A third via electrically connects the second portion of the first power line to the second pull-down transistor. A fourth via electrically connects the second bit line to the second pass-gate transistor.
A method, comprising:
A method, comprising:
A method, comprising:
Dependencies are inferred from the claim text.