Variable slew-rate current source gate drivers for hybrid power modules

A vehicle, comprising:

• a frame defining a body and a passenger cabin;
• a processing system coupled to a variable-current gate driver within the body and configured to send pulse width modulation (PWM) signals to the variable-current gate driver;
• a plurality of current sources in the variable-current gate driver under control of the PWM signals;
• and
• a polyphase power module (PPPM) comprising, for each phase of a motor coupled to the PPPM, one or more hybrid sets of switching transistors of different semiconductor technologies,
• wherein each of the current sources in the variable-current gate driver is coupled to a gate and at least one of the current sources is coupled to at least one other non-gate terminal of a respective one of the hybrid sets of switching transistors, and
• wherein the current sources are configured to provide slew rate (SR) control of each respective phase of the PPPM using variable gate current values to compensate for the different semiconductor technologies in real time to reduce switching losses and improve PPPM efficiency.

A variable-current gate driver (VCGD) apparatus for providing slew rate (SR) control of a power inverter module (PIM), comprising:

• a gate driver including a plurality of input terminals for receiving pulse-width-modulation (PWM) control signals transmitted from a processing system and a plurality of outputs;
• and
• a plurality of current sources under control of the PWM signals and coupled to a corresponding one of the plurality of outputs on the gate driver with the plurality of outputs coupled to respective gates of at least two transistors of a hybrid switch in the PIM, the at least two transistors comprising at least two different semiconductor technologies, at least one of the current sources is respectively coupled to one other non-gate terminal on each of the at least two transistors,
• wherein the plurality of current sources are configured to provide the SR control of the PIM using variable gate current values to compensate for the different semiconductor technologies in real time to reduce switching losses and improve PM efficiency,
• wherein the hybrid switch comprises one of at least two semiconductor technologies in the PM, wherein the current sources are configured to provide the SR control of the PM using variable values of bidirectional gate current,
• wherein a turn-on procedure of the hybrid switch comprises:
• a first time period in which at least one power transistor in an off-state has a steady positive value across non-gate terminals thereof, the steady positive value corresponding to an off-state, wherein at or near the end of the first time period, one or more of the current sources are configured to apply a high gate current rated for the at least one power transistor at a high switching speed, reducing deadtime and switching delay;
• a second time period during which the one or more of the current sources are configured to reduce a switching speed of the at least one power transistor by applying a lower, non-zero current to the respective gates of the hybrid switch to reduce dV/dt, overshoot, and ringing, while increasing switching speed;
• a third time period during which one or more of the current sources are configured to reduce a value of the respective gate currents to reduce dI/dt, overshoot, and ringing;
• and
• a fourth time period during which the one or more of the current sources are configured to increase a value of the respective gate currents to a high or near maximum value to minimize an on-resistance across the at least one power transistor and to minimize conduction losses.