Reducing inrush current to a capacitor bank

A computer program product comprising a non-transitory computer-readable storage medium and computer-executable components a stored in the storage medium, wherein the computer-executable components, which when run on processing circuitry of a controller, causes the controller to perform a method for reducing inrush current to an ungrounded capacitor bank when re-closing a switching device arranged between an AC voltage source and the capacitor bank in an electrical three-phase system, the method including:

• opening the switching device, by an opening sequence including:
• breaking the current of a first phase of the three phases, and
• after a predetermined opening time period starting at the breaking of the first phase, simultaneously breaking the current of a second phase of the three phases and the current of a third phase of the three phases;
• and
• following the opening, before the capacitor bank has fully discharged, closing the switching device, by a closing sequence including:
• simultaneously making the respective currents of the second and third phases, and
• after a predetermined closing time period starting at the making of the second and third phases, making the current of the first phase;
• wherein the predetermined opening time period corresponds to a 1/4+m period or a 3/4+m period of a voltage waveform of anyone of the three phases, where m is an integer of at least zero;
• and
• wherein,
• when the predetermined opening time period corresponds to a 1/4+m period, the predetermined closing time period corresponds to a 3/4+n period of the voltage waveform, and
• when the predetermined opening time period corresponds to a 3/4+m period, the predetermined closing time period corresponds to a 1/4+n period of the voltage waveform,
• where n is an integer of at least zero;
• wherein,
• when the capacitor bank is fully charged, or close thereto, at the closing of the switching device:
• when the predetermined opening time period corresponds to a 1/4+m period, the making of the second and third phases occurs at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a negative zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase, and
• when the predetermined opening time period corresponds to a 3/4+m period, the making of the second and third phases occurs at a negative zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase;
• and
• when the capacitor bank is partially charged at the closing of the switching device, the method further comprises, between the switching device and the capacitor bank, monitoring a voltage waveform of the second phase and a voltage waveform of the third phase;
• wherein the making of the second and third phases occurs when a voltage across the switching device for the second phase is the same as a voltage across the switching device for the third phase.

A controller for a switching device, the controller comprising:

• processing circuitry;
• and
• storage storing instructions executable by said processing circuitry whereby said controller is operative to perform a method for reducing inrush current to an ungrounded capacitor bank when re-closing the switching device arranged between an AC voltage source and the capacitor bank in an electrical three-phase system, the method including:
• opening the switching device, by an opening sequence including:
• breaking the current of a first phase of the three phases, and
• after a predetermined opening time period starting at the breaking of the first phase, simultaneously breaking the current of a second phase of the three phases and the current of a third phase of the three phases;
• and
• following the opening, before the capacitor bank has fully discharged, closing the switching device, by a closing sequence including:
• simultaneously making the respective currents of the second and third phases, and
• after a predetermined closing time period starting at the making of the second and third phases, making the current of the first phase;
• wherein the predetermined opening time period corresponds to a 1/4+m period or a 3/4+m period of a voltage waveform of anyone of the three phases, where m is an integer of at least zero;
• and
• wherein,
• when the predetermined opening time period corresponds to a 1/4+m period, the predetermined closing time period corresponds to a 3/4+n period of the voltage waveform, and
• when the predetermined opening time period corresponds to a 3/4+m period, the predetermined closing time period corresponds to a 1/4+n period of the voltage waveform,
• where n is an integer of at least zero;
• wherein,
• when the capacitor bank is fully charged, or close thereto, at the closing of the switching device:
• when the predetermined opening time period corresponds to a 1/4+m period, the making of the second and third phases occurs at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a negative zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase, and
• when the predetermined opening time period corresponds to a 3/4+m period, the making of the second and third phases occurs at a negative zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase;
• and
• when the capacitor bank is partially charged at the closing of the switching device, the method further comprises, between the switching device and the capacitor bank, monitoring a voltage waveform of the second phase and a voltage waveform of the third phase;
• wherein the making of the second and third phases occurs when a voltage across the switching device for the second phase is the same as a voltage across the switching device for the third phase.

An electrical three-phase system comprising:

• a switching device;
• an ungrounded capacitor bank;
• and
• a controller for the switching device, the controller comprising:
• processing circuitry;
• and
• storage storing instructions executable by said processing circuitry whereby said controller is operative to perform a method for reducing inrush current to the ungrounded capacitor bank when re-closing the switching device arranged between an AC voltage source and the capacitor bank, the method including:
• opening the switching device, by an opening sequence including:
• breaking the current of a first phase of the three phases, and
• after a predetermined opening time period starting at the breaking of the first phase, simultaneously breaking the current of a second phase of the three phases and the current of a third phase of the three phases;
• and
• following the opening, before the capacitor bank has fully discharged, closing the switching device, by a closing sequence including:
• simultaneously making the respective currents of the second and third phases, and
• after a predetermined closing time period starting at the making of the second and third phases, making the current of the first phase;
• wherein the predetermined opening time period corresponds to a 1/4+m period or a 3/4+m period of a voltage waveform of anyone of the three phases, where m is an integer of at least zero;
• and
• wherein,
• when the predetermined opening time period corresponds to a 1/4+m period, the predetermined closing time period corresponds to a 3/4+n period of the voltage waveform, and
• when the predetermined opening time period corresponds to a 3/4+m period, the predetermined closing time period corresponds to a 1/4+n period of the voltage waveform,
• where n is an integer of at least zero;
• wherein,
• when the capacitor bank is fully charged, or close thereto, at the closing of the switching device:
• when the predetermined opening time period corresponds to a 1/4+m period, the making of the second and third phases occurs at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a negative zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase, and
• when the predetermined opening time period corresponds to a 3/4+m period, the making of the second and third phases occurs at a negative in the voltage waveform of the first phase if the breaking of the first phase occurred at the minimum in the voltage waveform of the first phase, or at a positive zero-crossing in the voltage waveform of the first phase if the breaking of the first phase occurred at the maximum in the voltage waveform of the first phase;
• and
• when the capacitor bank is partially charged at the closing of the switching device, the method further comprises, between the switching device and the capacitor bank, monitoring a voltage waveform of the second phase and a voltage waveform of the third phase;
• wherein the making of the second and third phases occurs when a voltage across the switching device for the second phase is the same as a voltage across the switching device for the third phase.