Low capacitance poly-bounded silicon controlled rectifiers
AssigneeAnalog Devices, Inc.
InventorsSrivatsan Parthasarathy, Shudong Huang, Yuanzhong Zhou, Jean-Jacques Hajjar
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Abstract
Low capacitance poly-bounded silicon controlled rectifiers (SCRs) are disclosed herein. In certain embodiments, an SCR includes an n-type well (NW) and a p-type well (PW) formed adjacent to one another in a substrate. The SCR further includes active regions including p-type active (P+) fin regions over the NW and connected to an anode terminal of the SCR, and n-type active (N+) fin regions over the PW and connected to a cathode terminal of the SCR. The SCR further includes polysilicon gate regions over the PW and NW that serve to separate the active regions while also improving the SCR's turn-on speed in response to fast overstress transients.
Claims20
A silicon controlled rectifier (SCR) protection structure for protecting an interface from an electrical overstress event, the SCR protection structure comprising:
- an n-type well (NW) formed in a substrate;
- a p-type well (PW) formed in the substrate adjacent to the NW;
- a plurality of active regions including a first p-type active (P+) fin region over the NW and connected to an anode terminal, and a first n-type active (N+) fin region over the PW and connected to a cathode terminal;
- and
- a plurality of polysilicon gate regions formed over the PW and NW, wherein the plurality of polysilicon gate regions separate the plurality of active regions.
A semiconductor die comprising:
- a plurality of pads including a signal pad and a ground pad;
- a circuit electrically connected to the signal pad;
- and
- a silicon controlled rectifier (SCR) including an anode terminal electrical connected to the signal pad and a cathode terminal electrically connected to the ground pad, wherein the SCR comprises:
- an n-type well (NW) formed in a substrate;
- a p-type well (PW) formed in the substrate adjacent to the NW;
- a plurality of active regions including a first p-type active (P+) fin region over the NW and connected to the anode terminal, and a first n-type active (N+) fin region over the PW and connected to the cathode terminal;
- and
- a plurality of polysilicon gate regions formed over the PW and NW, wherein the plurality of polysilicon gate regions separate the plurality of active regions.
A method of forming a silicon controlled rectifier (SCR) protection structure, the method comprising:
- forming an n-type well (NW) in a substrate;
- forming a p-type well (PW) formed in the substrate adjacent to the NW;
- forming a plurality of active regions over the PW and the NW, wherein the plurality of active regions include a first p-type active (P+) fin region over the NW and serving as an anode of the SCR, and a first n-type active (N+) fin region over the PW and serving as a cathode of the SCR;
- and
- separating the plurality of active regions by forming a plurality of polysilicon gate regions over the PW and NW.
Dependencies are inferred from the claim text.