Enhanced PPM frequency offset detector
AssigneeInternational Business Machines Corporation
InventorMatthew James Paschal
Life of this patent
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Abstract
Embodiments herein describe circuitry and techniques to implement an enhanced PPM frequency offset detector and methods for implementing operational functions of one or more embodiments of the PPM frequency offset detector to detect a frequency offset between two clock signals. An enhanced PPM frequency offset detector of one or more embodiments reduces circuitry and power requirements, eliminating circuitry requirements of a third reference clock signal to detect the frequency offset of some traditional arrangements, and effectively and efficiently detects a PPM frequency offset between two clock signals.
Claims20
A method comprising:
- receiving, by a first source counter, a first clock signal;
- receiving, by a second source counter, a second clock signal;
- transmitting by the first source counter, a count output of the first source counter, to an offset counter clock controller;
- transmitting by the second source counter, a count output of the second source counter, to the offset counter clock controller;
- receiving, by the offset counter clock controller, the first clock signal, and the second clock signal;
- and
- detecting, by the offset counter clock controller, a faster clock signal of the first clock signal and the second clock signal, and applying the faster clock signal to a PPM (parts per million) frequency offset counter, wherein the offset counter clock controller enables counting the faster clock signal, by the PPM frequency offset counter, based on the count output of the faster clock signal, and disables counting the faster clock signal based on the count output of the slower clock signal, to detect a frequency offset between the first clock signal and the second clock signal.
A frequency offset detector comprising:
- a first source counter configured to receive and count a first clock signal;
- a second source counter configured to receive and count a second clock signal;
- an offset counter clock controller coupled to the first source counter and the second source counter, the offset counter clock controller configured to receive the first clock signal, the second clock signal, a count output of the first source counter, and a count output of second source counter;
- a PPM (parts per million) frequency offset counter coupled to the offset counter clock controller to detect a frequency offset between the first clock signal and the second clock signal;
- wherein the offset counter clock controller is further configured to:
- detect a faster clock signal of the first clock signal and the second clock signal, based on the count output of the first source counter, and the count output of second source counter;
- apply the faster clock signal to the PPM frequency offset counter;
- enable counting the faster clock signal, by the PPM frequency offset counter, based on the count output of the faster clock signal;
- and
- disable the counting the faster clock signal, by the PPM frequency offset counter, based on the count output of the slower clock signal.
Dependencies are inferred from the claim text.