Testing parity and ECC logic using MBIST
AssigneeAdvanced Micro Devices, Inc.
InventorsBalatripura S. Chavali, Chetana Nagendra Keltcher, William Andrew Halliday
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Abstract
A processing device used for MBIST is provided which comprises a data storage structure configured to store data, data protection circuitry configured to add at least one protection bit to corresponding portions of the data written to the data storage structure, data protection checking circuitry configured to identify one or more errors made by the data protection circuitry and an MBIST controller configured to receive the corresponding portions of data written to the data storage structure and receive at least one indication identifying the one or more errors.
Claims19
A processing device used for performing a memory built in self-test (MBIST), the processing device comprising:
- a data storage structure configured to store data;
- data protection circuitry configured to add a protection token to corresponding portions of the data written to the data storage structure;
- data protection checking circuitry configured to identify one or more errors made by the data protection circuitry;
- and
- an MBIST controller that is communicatively coupled to the data storage structure, the data protection circuitry and the data protection checking circuitry, wherein the MBIST controller is configured to perform the MBIST by:
- controlling a number of bits in the protection token,
- receiving the corresponding portions of the data written the data storage structure,
- receiving, from the data protection checking circuitry, at least one indication identifying the one or more errors made by the data protection circuitry,
- detecting a logic fault in the data protection checking circuitry based on the at least one indication, and
- indicating that the MBIST fails when the logic fault in the data protection checking circuitry is detected.
A memory built in self-test (MBIST) controller used in a processing device, the MBIST controller comprising:
- a processor, and
- a communication interface that is communicatively coupled to a data storage structure, a data protection circuitry and a data protection checking circuitry, wherein the MBIST controller configured to:
- generate a sequence of read and write operations to different portions of the data storage structure;
- and
- for each corresponding portion of data written to and read from the data storage structure:
- control a number of protection bits in a protection token to add to the corresponding portion of data by the data protection circuity;
- control the data protection circuitry to add the protection token to the corresponding portion of data;
- receive the number of protection bits and the corresponding portion of data written to and read from the data storage structure;
- receive at least one indication, from data protection checking circuitry, identifying one or more errors by the data protection circuitry,
- detect a logic fault in the data protection checking circuitry based on the at least one indication,
- indicate that the MBIST fails when the logical fault in the data protection checking circuitry is detected.
A method for performing a memory built in self-test (MBIST), the method comprising:
- generating, by a MBIST controller, portions of data to be written to a data storage structure;
- controlling, by the MBIST controller, a number of protection bits in a protection token to be added to the corresponding portion of data;
- writing, by the MBIST, the data and the protection token to the data storage structure using data protection circuitry;
- receiving, by the MBIST controller an indication of one or more errors made by the data protection circuitry;
- detecting a logic fault in the data protection checking circuitry based on the indication;
- and
- indicating that the MBIST fails when the logical fault in the data protection checking circuitry is detected.
Dependencies are inferred from the claim text.