Duty cycle correction method and duty cycle correction apparatus

A duty cycle correction method, adapted for controlling a duty cycle adjuster to correct a duty cycle of a clock signal, the method comprising:

• adjusting the duty cycle of the clock signal generated by a clock signal generator by using a duty cycle adjuster, and inputting the adjusted clock signal to a plurality of data pads of a storage device to generate a plurality of data signals, wherein the data pads are divided into at least two groups and defined by data patterns that are inverse to each other;
• detecting direct current voltages of the data signals generated by a first group of the data pads to generate a first average direct current voltage, and detecting direct current voltages of the data signals generated by a second group of the data pads are detected to generate a second average direct current voltage by using a detection circuit comprising a plurality of detectors respectively coupled to the data pads;
• comparing the first average direct current voltage and the second average direct current voltage, and outputting a comparison result by using a comparator coupled to the detection circuit;
• and
• controlling the duty cycle adjuster to adjust the duty cycle of the clock signal according to the comparison result by using a control logic coupled to the comparator.