Transmitter driver circuit
AssigneeSynopsys, Inc.
InventorsQing Jiang, Adam Ross Burns, Karanbir Singh Chahal, Yunus Ibrahim Dawji
Life of this patent
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Abstract
A level-shiftless transmitter includes a transmitter driver circuit. The transmitter driver circuit includes a first PMOS device, a second PMOS device, a first NMOS device, a second NMOS device, and a sub-circuit. The sources of the first and second PMOS devices are electrically coupled with each other. The gates of the first PMOS and the first NMOS devices are electrically coupled with each other. The gates of the second PMOS and the second NMOS devices are electrically coupled with each other. The sub-circuit is electrically coupled with a voltage domain to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices.
Claims20
A transmitter driver circuit, comprising:
- a first PMOS device having a gate, a source, and a drain;
- a second PMOS device having a gate, a source, and a drain, wherein the source of the second PMOS device is electrically coupled with the source of the first PMOS device;
- a first NMOS device having a gate, a source, and a drain;
- a second NMOS device having a gate, a source, and a drain, wherein the gate of the first PMOS device is electrically coupled with the gate of the first NMOS device, and the gate of the second PMOS device is electrically coupled with the gate of the second NMOS device, and
- a sub-circuit electrically coupled with a voltage domain and the sources of the first and second PMOS devices to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices, wherein the sub-circuit comprises:
- (i) a third PMOS device having a gate, a drain, and a source, wherein the source is electrically coupled with the voltage domain, and the gate is configured to receive a control signal to turn on or off current flow through the source and the drain of the third PMOS device, and a third resistor electrically coupled with the drain of the third PMOS device and the sources of the first and second PMOS devices;
- or
- (ii) a programmable diode array circuit comprising a plurality of programmable diodes in parallel, wherein each of the plurality of programmable diodes is configured to receive a control signal to control impedance of the programmable diode, which in turn controls the voltage provided to the sources of the first and second PMOS devices.
A transmitter driver comprising:
- a pre-driver circuit configured to serialize multi-bit data into 1-bit data;
- and
- a driver circuit configured to receive the 1-bit data from the pre-driver and transmit the 1-bit data, wherein the driver circuit comprises:
- a first PMOS device having a gate, a source, and a drain;
- a second PMOS device having a gate, a source, and a drain, wherein the source of the second PMOS device is electrically coupled with the source of the first PMOS device;
- a first NMOS device having a gate, a source, and a drain;
- a second NMOS device having a gate, a source, and a drain, wherein the gate of the first PMOS device is electrically coupled with the gate of the first NMOS device, and the gate of the second PMOS device is electrically coupled with the gate of the second NMOS device, and
- a sub-circuit electrically coupled with a voltage domain and the sources of the first and second PMOS devices to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices, wherein the sub-circuit comprises:
- (i) a third PMOS device having a gate, a drain, and a source, wherein the source is electrically coupled with the voltage domain, and the gate is configured to receive a control signal to turn on or off current flow through the source and the drain of the third PMOS device, and a third resistor electrically coupled with the drain of the third PMOS device and the sources of the first and second PMOS devices;
- or
- (ii) a programmable diode array circuit comprising a plurality of programmable diodes in parallel, wherein each of the plurality of programmable diodes is configured to receive a control signal to control impedance of the programmable diode, which in turn controls the voltage provided to the sources of the first and second PMOS devices.
A non-transitory computer readable medium comprising stored instructions, which when executed by a processor, cause the processor to simulate a transmitter driver circuit, wherein the transmitter driver circuit comprises:
- a first PMOS device having a gate, a source, and a drain;
- a second PMOS device having a gate, a source, and a drain, wherein the source of the second PMOS device is electrically coupled with the source of the first PMOS device;
- a first NMOS device having a gate, a source, and a drain;
- a second NMOS device having a gate, a source, and a drain, wherein the gate of the first PMOS device is electrically coupled with the gate of the first NMOS device, and the gate of the second PMOS device is electrically coupled with the gate of the second NMOS device, and
- a sub-circuit electrically coupled with a voltage domain and the sources of the first and second PMOS devices to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices, wherein the sub-circuit comprises:
- (i) a third PMOS device having a gate, a drain, and a source, wherein the source is electrically coupled with the voltage domain, and the gate is configured to receive a control signal to turn on or off current flow through the source and the drain of the third PMOS device, and a third resistor electrically coupled with the drain of the third PMOS device and the sources of the first and second PMOS devices;
- or
- (ii) a programmable diode array circuit comprising a plurality of programmable diodes in parallel, wherein each of the plurality of programmable diodes is configured to receive a control signal to control impedance of the programmable diode, which in turn controls the voltage provided to the sources of the first and second PMOS devices.
Dependencies are inferred from the claim text.