Semiconductor memory device for determining operation state with detecting frequency of input clock signal

A method for determining operation state of a semiconductor memory device, the method comprising:

• detecting, by a frequency detection circuit, a frequency of an input clock signal generated during a measurement time and generating a frequency confirmation data having information on the frequency of the input clock signal, wherein a data value of the frequency confirmation data is associated with a logic state of a corresponding one of 1-st to n-th confirmation counting signals, and the frequency of the input clock signal is divided into 1-st to m-th frequency ranges which do not overlap each other and are increased:
• receiving, by a status register, the frequency confirmation data and generating 1-st to m-th driving control signals, wherein the k-th driving control signal is activated in case that the frequency of the input clock signal is in the k-th frequency range;
• and
• driving, by a k-th operation circuit, the semiconductor memory device in an operating state in response to activation of the k-th driving control signal, wherein
• ‘n’ is a natural number greater than or equal to ‘2’,
• ‘m’ is a natural number greater than or equal to ‘2’,
• ‘k’ is a natural number from ‘1’ to ‘m’, and
• the frequency detection circuit includes:
• a measurement enable generating part that generates a measurement enable signal, wherein the measurement enable signal is activated during the measurement time;
• and
• a frequency counting part that receives the input clock signal and the measurement enable signal, and generates the frequency confirmation data, wherein the frequency confirmation data includes information on a number of clocks of the input clock signal generated during activation of the measurement enable signal.