Area efficient bidirectional switch with off state injection current control

A transmission unit comprising a transmission switch and an injection current control circuit, wherein the transmission switch comprises a plurality of n-MOS and p-MOS transistors connected to one another in parallel between an input and an output, wherein the injection current control circuit comprises:

• an injection current detection circuit that is arranged for being activated upon detection of an injection current in the output or the input of the transmission unit, wherein the injection current detection circuit comprises:
• a circuit at the input comprising a P-MOS transistor connected to the input, wherein the P-MOS transistor has a gate that is connected to a supply voltage, the circuit at the input further comprising a first resistor connected in series with an N-MOS transistor, wherein the N-MOS transistor has a gate that is connected to a drain of the P-MOS transistor and to a second resistor, wherein the N-MOS transistor has a source that is connected to an end of the second resistor and to ground, and wherein the N-MOS transistor has a drain that forms an activation for a bypass circuit, and/or
• a circuit at the output comprising a P-MOS transistor connected to the input, wherein the P-MOS transistor has a gate that is connected to a supply voltage, the circuit at the output further comprising a third resistor connected in series with an N-MOS transistor, wherein the N-MOS transistor has a gate that is connected to a drain of the P-MOS transistor and to a fourth resistor, wherein the N-MOS transistor has a source that is connected to an end of the fourth resistor and to ground, and wherein the N-MOS transistor has a drain that forms an activation for a bypass circuit, and wherein the transmission unit further comprises a bypass circuit arranged for being activated by the injection current detection circuit and further arranged for bypassing the injection current to a ground upon detection of the injection current;
• and
• wherein drains of the plurality of n-MOS and p-MOS transistors are shorted, and wherein the bypass circuit is arranged for bypassing the injection current to the ground, by providing a current path from the drains to the ground.