Unidirectional hybrid switch circuit

A hybrid switch comprising:

• an upper terminal, a lower terminal, and a control terminal;
• a BJT defining an upper base, a lower base, an upper collector-emitter coupled to the upper terminal, and a lower collector-emitter;
• a lower cascode FET defining a drain coupled to the lower collector-emitter, a source coupled to the lower terminal, and a gate;
• a main FET defining a drain coupled to the upper terminal, a source coupled to the lower terminal, and a gate;
• a diode having an anode coupled to the lower terminal and a cathode coupled to the upper terminal;
• a driver coupled to the upper terminal, the lower terminal, the control terminal, the upper base, the lower base, the gate of the lower cascode FET, and the gate of the main FET, the driver configured to:
• sense an applied voltage across the upper terminal and the lower terminal;
• when the applied voltage is more positive on the upper terminal and the control terminal is de-asserted, arrange the BJT and main FET to block current flow through the hybrid switch;
• when the applied voltage is more positive on the upper terminal and the control terminal is asserted, enable a forward current to flow through from the upper terminal to the lower terminal, with the forward current shared between main FET and the BJT;
• and
• when the applied voltage is more positive on the lower terminal, enable a reverse current to flow through the hybrid switch.