Vector computation unit in a neural network processor
AssigneeGoogle Inc.
InventorsGregory Michael Thorson, Christopher Aaron Clark, Dan Luu
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Abstract
A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.
Claims20
A vector computation unit for performing neural network computations comprising:
- normalization circuitry configured to:
- receive a vector of activation values;
- receive one or more control signals specifying a normalization function;
- and
- apply the normalization function to the activation values to generate respective normalized values for each activation value.
A method for performing neural network computations comprising:
- receiving, by normalization circuitry of a vector computation unit, a vector of activation values;
- receiving, by the normalization circuitry, one or more control signals specifying a normalization function;
- and
- applying, by the normalization circuitry, the normalization function to the activation values to generate respective normalized values for each activation value.
A non-transitory computer readable medium for storing instructions executable by a processor to perform neural network computations, the instructions comprising:
- receiving a vector of activation values;
- receiving one or more control signals specifying a normalization function;
- and
- applying the normalization function to the activation values to generate respective normalized values for each activation value.
Dependencies are inferred from the claim text.