Display substrate including shielding pattern overlapping reset transistor, method for manufacturing the same, and display device

A method for manufacturing a display substrate, comprising forming a plurality of sub-pixels arranged in an array on a substrate, and the step of forming the plurality of sub-pixels includes:

• forming an initialization signal line pattern, at least part of the initialization signal line pattern extending along the first direction;
• forming a reset signal line pattern, at least part of the reset signal line pattern extending along the first direction;
• forming a power signal line pattern, at least part of the power signal line pattern extending along a second direction, the second direction intersecting the first direction;
• forming a sub-pixel driving circuit, wherein the sub-pixel driving circuit includes a driving transistor and a first reset transistor, a gate electrode of the first reset transistor is electrically connected to the reset signal line pattern, a first electrode of the first reset transistor is electrically connected to the initialization signal line pattern, and a second electrode of the first reset transistor is electrically connected to the gate electrode of the driving transistor;
• forming a shielding pattern, wherein the shielding pattern is electrically connected to the power signal line pattern, an orthographic projection of the shielding pattern on the pixel unit, and the shielding pattern is electrically connected to the power signal line pattern through a connection hole;
• wherein the second electrode of the first reset transistor is electrically connected to the gate electrode of the driving transistor through a fifth conductive connection portion, an orthographic projection of the connection hole on the substrate is located between an orthographic projection of the gate electrode of the first reset transistor on the substrate and an orthographic projection of the fifth conductive connection portion on the substrate in plan view.