Clock generation circuit and image sensor

An image sensor, comprises:

• a pixel array, configured to sense an image to generate image sensing signals;
• a reading circuit, configured to read the image sensing signals;
• an ADC, configured to generate digital signals according to the image sensing signals;
• and
• a clock generation circuit, comprising:
• a first RC circuit, comprising a first capacitor, coupled to a first predetermined voltage level and a second predetermined voltage level;
• a first switch, coupled to the first RC circuit;
• a second RC circuit, comprising a second capacitor, coupled to the first switch;
• a second switch, coupled to the second RC circuit;
• a comparator, comprising:
• a first input terminal, coupled to the second RC circuit and the second switch;
• a second input terminal, configured to receive a reference voltage level;
• and
• an output terminal, coupled to a control terminal of the first switch and a control terminal of the second switch;
• and
• a logic circuit, coupled to the output terminal of the comparator, configured to generate a clock signal to at least one of the pixel array, the reading circuit and the ADC;
• wherein the first switch and the second switch turn on and the second capacitor is discharged when a voltage of the second capacitor is higher than the reference voltage level;
• wherein the image sensor further comprises:
• a discharging time setting circuit, configured to set a discharging time during which the second capacitor is discharged.

A clock generation circuit, comprising:

• a first RC circuit, comprising a first capacitor, coupled to a first predetermined voltage level and a second predetermined voltage level;
• a first switch, coupled to the first RC circuit;
• a second RC circuit, comprising a second capacitor, coupled to the first switch;
• a second switch, coupled to the second RC circuit;
• a comparator, comprising:
• a first input terminal, coupled to the second RC circuit and the second switch;
• a second input terminal, configured to receive a reference voltage level;
• and
• an output terminal, coupled to a control terminal of the first switch and a control terminal of the second switch;
• and
• a logic circuit, coupled to the output terminal of the comparator, configured to generate a clock signal;
• wherein the first RC circuit is provided outside an IC;
• wherein the first switch, the second RC circuit, the second switch, the comparator and the logic circuit are provided inside the IC.

An image sensor, comprises:

• a pixel array, configured to sense an image to generate image sensing signals;
• a reading circuit, configured to read the image sensing signals;
• an ADC, configured to generate digital signals according to the image sensing signals;
• and
• a clock generation circuit, comprising:
• a first RC circuit, comprising a first capacitor, coupled to a first predetermined voltage level and a second predetermined voltage level;
• a first switch, coupled to the first RC circuit;
• a second RC circuit, comprising a second capacitor, coupled to the first switch;
• a second switch, coupled to the second RC circuit;
• a comparator, comprising:
• a first input terminal, coupled to the second RC circuit and the second switch;
• a second input terminal, configured to receive a reference voltage level;
• and
• an output terminal, coupled to a control terminal of the first switch and a control terminal of the second switch;
• and
• a logic circuit, coupled to the output terminal of the comparator, configured to generate a clock signal to at least one of the pixel array, the reading circuit and the ADC;
• wherein the first RC circuit is provided outside an IC;
• wherein the first switch, the second RC circuit, the second switch, the comparator and the logic circuit are provided inside the IC.