Automatic optimization method of performance parameters of a signal generator circuit

A signal generator circuit, comprising a digital signal generator circuit, a digital compensation circuit, at least one digital-to-analog converter (DAC), an in-phase and quadrature (IQ) modulation circuit, a radio-frequency (RF) circuit, and a control circuit,

• wherein the digital signal generator circuit is configured to generate a digital baseband signal,
• wherein the digital compensation circuit is configured to filter the digital baseband signal, thereby obtaining a filtered baseband signal,
• wherein the at least one DAC is configured to convert the filtered baseband signal into an analog baseband signal,
• wherein the IQ modulation circuit is configured to modulate the analog baseband signal, thereby obtaining a modulated RF signal,
• wherein the RF circuit is configured to process the modulated RF signal, thereby obtaining an RF output signal,
• wherein the control circuit is configured to determine a performance parameter of the signal generator circuit based on the RF output signal,
• wherein the control circuit is configured to automatically adapt at least one operational parameter of the signal generator circuit in order to optimize the performance parameter,
• wherein the at least one operational parameter comprises a power level of the digital baseband signal, a baseband frequency offset of the digital baseband signal, a filter headroom of the digital compensation circuit, a frequency response of the digital compensation circuit, an operating point of the at least one DAC, an IQ offset of the IQ modulation circuit, a gain of the IQ modulation circuit, a quadrature value of the IQ modulation circuit, and/or an RF frequency offset of the RF circuit,
• wherein the performance parameter is an error vector magnitude (EVM) or an adjacent channel leakage ratio (ACLR), and
• wherein the control circuit is configured to raise the operating point of the at least one DAC if the performance parameter is an EVM and/or wherein the control circuit is configured to lower the operating point of the at least one DAC if the performance parameter is an ACLR.

A signal generator circuit, comprising a digital signal generator circuit, a digital compensation circuit, at least one digital-to-analog converter (DAC), an in-phase and quadrature (IQ) modulation circuit, a radio-frequency (RF) circuit, and a control circuit,

• wherein the digital signal generator circuit is configured to generate a digital baseband signal,
• wherein the digital compensation circuit is configured to filter the digital baseband signal, thereby obtaining a filtered baseband signal,
• wherein the IQ modulation circuit is configured to modulate the filtered baseband signal, thereby obtaining a digital modulated RF signal,
• wherein the at least one DAC is configured to convert the digital modulated RF signal into a modulated RF signal, wherein the modulated RF signal is an analog signal,
• wherein the RF circuit is configured to process the modulated RF signal, thereby obtaining an RF output signal,
• wherein the control circuit is configured to determine a performance parameter of the signal generator circuit based on the RF output signal,
• wherein the control circuit is configured to automatically adapt at least one operational parameter of the signal generator circuit in order to optimize the performance parameter,
• wherein the at least one operational parameter comprises a power level of the digital baseband signal, a baseband frequency offset of the digital baseband signal, a filter headroom of the digital compensation circuit, a frequency response of the digital compensation circuit, an operating point of the at least one DAC, and/or an RF frequency offset of the RF circuit,
• wherein the performance parameter is an error vector magnitude (EVM) or an adjacent channel leakage ratio (ACLR), and
• wherein the control circuit is configured to raise the operating point of the at least one DAC if the performance parameter is an EVM and/or wherein the control circuit is configured to lower the operating point of the at least one DAC if the performance parameter is an ACLR.