Semiconductor transistor device including multiple channel layers with different materials

A semiconductor device comprising:

• a substrate;
• a first transistor disposed on the substrate, the first transistor including:
• a first active region extending on the substrate in a first horizontal direction parallel to an upper surface of the substrate,
• a plurality of first channel layers disposed on the first active region, wherein first channel layers of the plurality of first channel layers are spaced apart from each other, the first channel layers including a first uppermost channel layer and first lower channel layers,
• a first gate structure intersecting the first active region and the plurality of first channel layers, and extending in a second horizontal direction, and
• a first source/drain region disposed on the first active region on at least one side of the first gate structure and contacting the plurality of first channel layers;
• and
• a second transistor disposed on the substrate, the second transistor including:
• a second active region spaced apart from the first active region,
• a second channel layer disposed on the second active region,
• a second gate structure intersecting the second active region and the second channel layer, and extending in a vertical direction perpendicular to the upper surface of the substrate, and
• a second source/drain region disposed on the second active region on at least one side of the second gate structure and contacting the second channel layer,
• wherein a threshold voltage of the first transistor is lower than a threshold voltage of the second transistor,
• wherein the first uppermost channel layer is thicker than each of the first lower channel layers,
• wherein the second channel layer has a thickness greater than a sum of thicknesses of the first channel layers of the plurality of first channel layers, and
• wherein the second channel layer includes a material that is different from a material included in the first uppermost channel layer.

A semiconductor device comprising:

• a substrate;
• an active region disposed on the substrate and extending on the substrate in a first horizontal direction parallel to an upper surface of the substrate;
• a plurality of channel layers disposed on the active region, the plurality of channel layers including:
• at least one lower channel layer disposed on the active region, the at least one lower channel layer including silicon, and
• an uppermost channel layer disposed on the at least one lower channel layer and spaced apart from the at least one lower channel layer in a vertical direction perpendicular to the upper surface of the substrate, wherein the uppermost channel layer has a thickness greater than a thickness of the at least one lower channel layer, includes a material that is different from a material included in the at least one lower channel layer, and includes silicon carbide;
• a gate structure disposed on the substrate, intersecting the active region and the plurality of channel layers, and extending in a second horizontal direction, wherein the gate structure includes a gate electrode surrounding the plurality of channel layers;
• spacer structures disposed on opposing sidewalls of the gate structure;
• and
• a source/drain region disposed on the active region on at least one side of the gate structure and contacting the plurality of channel layers.