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US 12,224,341 B2Granted
Semiconductor device and method of manufacturing the same
AssigneesHyundai Motor Company, Kia Corporation
InventorNackYong Joo
Life of this patent
Estimating the term…
Abstract
A semiconductor device according to an embodiment of the present disclosure includes: a conductive region, an end region positioned at a portion where the conductive region ends, and a connection region positioned between the conductive region and the end region. The conductive region includes: an n+ type substrate; an n− type layer positioned at the first surface of the n+ type substrate; and a p type region positioned on the n− type layer, and a gate electrode that fills an inside of a trench penetrating the p type region and positioned in the n− type layer, and a side wall of the trench positioned at the portion where the conductive region ends is inclined.
Claims15
A semiconductor device comprising:
- a conductive region, wherein the conductive region includes:
- an n+ type substrate,
- an n− type layer positioned at a first surface of the n+ type substrate,
- a p type region positioned on the n− type layer, and
- a gate electrode that fills an inside of a trench penetrating the p type region and positioned in the n− type layer, and
- a side wall of the trench positioned at beside a portion where the conductive region ends is inclined;
- an end region positioned at the portion where the conductive region ends;
- and
- a connection region positioned between the conductive region and the end region,
- wherein a region under the inclined side wall of the trench is filled with an insulating material, and the region under the inclined side wall of the trench is a region surrounded by the inclined side wall, a line extending horizontally at the intersection point of the inclined side wall and the bottom surface of the trench, and a line extending vertically at the intersection of the inclined side wall and a lower gate runner,
- wherein a p type end structure is positioned in the n− type layer of the end region, and the p type end structure includes a plurality of regions injected with p type ions, and the regions injected with the p type ions are spaced apart from each other by a predetermined interval, and
- the side wall of the trench is inclined from the intersection point of the side wall and the bottom surface of the trench to the intersection of the side wall and the lower gate runner.
9 more elements
A manufacturing method of a semiconductor device, comprising:
- forming an n− type layer on a first surface of an n+ type substrate including a conductive region, an end region positioned at a portion where the conductive region ends, and a connection region positioned between the conductive region and the end region;
- forming a p type region on the n− type layer;
- etching the n− type layer to form a trench;
- and
- forming a gate electrode in the trench,
- wherein in the forming of the trench, a side wall of the trench positioned at the portion where the conductive region ends is etched to be inclined,
- wherein the semiconductor device comprises a conductive region,
- wherein the conductive region includes an n+ type substrate, an n− type layer positioned at a first surface of the n+ type substrate, a p type region positioned on the n− type layer, and
- a gate electrode that fills an inside of a trench penetrating the p type region and positioned in the n− type layer, and a side wall of the trench positioned at a portion where the conductive region ends is inclined;
- an end region positioned beside the portion where the conductive region ends;
- and
- a connection region positioned between the conductive region and the end region,
- wherein a region under the inclined side wall of the trench is filled with an insulating material, and the region under the inclined side wall of the trench is a region surrounded by the inclined side wall, a line extending horizontally at the intersection point of the inclined side wall and the bottom surface of the trench, and a line extending vertically at the intersection of the inclined side wall and a lower gate runner,
- wherein a p type end structure is positioned in the n− type layer of the end region, and the p type end structure includes a plurality of regions injected with p type ions, and the regions injected with the p type ions are spaced apart from each other by a predetermined interval, and
- the side wall of the trench is inclined from the intersection point of the side wall and the bottom surface of the trench to the intersection of the side wall and the lower gate runner.
12 more elements
Dependencies are inferred from the claim text.