Method of forming backside power rails

A method, comprising:

• receiving a workpiece including a substrate and a fin structure over the substrate, wherein the fin structure includes a stack of first semiconductor layers and second semiconductor layers alternately arranged one over another;
• forming a gate stack over the fin structure;
• recessing a source region of the fin structure to form an extended opening, wherein the extended opening extends into the substrate;
• forming a semiconductor plug in a bottom portion of the extended source opening and a source feature over the semiconductor plug;
• removing a portion of the substrate to expose a bottom portion of the semiconductor plug, such that a remaining portion of the substrate remains;
• performing a pre-amorphous implantation (PAI) process to amorphize the remaining portion of the substrate;
• performing a wet etching process to remove the amorphized remaining portion of the substrate, thereby forming an opening;
• depositing a dielectric layer in the opening;
• and
• replacing the semiconductor plug with a backside source contact.

A method, comprising:

• forming a fin structure over a substrate;
• forming a source feature in the fin structure and a sacrificial plug below the source feature;
• removing a portion of the substrate to expose the sacrificial plug, such that a top portion of the substrate remains;
• performing a pre-amorphous implantation (PAI) process to amorphize the top portion of the substrate;
• removing the amorphized top portion of the substrate;
• replacing the sacrificial plug with a backside source contact;
• and
• forming a dielectric layer below the fin structure, such that the sacrificial plug is embedded in the dielectric layer.