Bond pad structure with high via density

A method for forming an integrated circuit (IC) chip, the method comprising:

• forming a first bond wire overlying a substrate on a frontside of the substrate;
• depositing a dielectric structure overlying the first bond wire;
• patterning the dielectric structure to form a via opening and a wire opening overlapping with the via opening, wherein the via opening and the wire opening expose a surface of the first bond wire;
• filling the via opening and the wire opening with conductive material to respectively form a via structure and a second bond wire;
• and
• forming a pad exposed from a backside of the substrate, opposite the frontside, and comprising a pair of protrusions protruding through the substrate to the first bond wire;
• wherein the surface of the first bond wire has a first area, wherein a portion of the surface of the first bond wire exposed by the via opening has a second area that is more than 10% of the first area, wherein the via structure has a pad region and a ring-shaped region in a plane parallel to the surface of the first bond wire and between and spaced from the first bond wire and the second bond wire, wherein the ring-shaped region is non-overlapping with the pad region and has a ring-shaped sidewall extending in a continuous, closed path around the pad region in the plane, wherein the via structure further has a first pair of sidewalls and a second pair of sidewalls that are non-overlapping with the pad and ring-shaped regions and that extend continuously, and in parallel with each other, from the pad region to the ring-shaped region in the plane, wherein the first pair of sidewalls share a first length in the plane and are separated from each other by a first separation, and wherein the second pair of sidewalls share a second length in the plane greater than the first length and are separated from each other by a second separation greater than the first separation.

A method for forming an integrated circuit (IC) chip, the method comprising:

• forming a first bond wire overlying a substrate on a first side of the substrate;
• forming a via overlying and directly contacting the first bond wire on the first side of the substrate and separated from the substrate by the first bond wire;
• forming a second bond wire overlying and directly contacting the via on the first side of the substrate and separated from the substrate by the via;
• and
• after the forming of the second bond wire, vertically flipping the substrate and forming a pad structure inset into the substrate from a second side of the substrate, opposite the first side of the substrate, wherein the first bond wire is directly between the second bond wire and the pad structure in a vertical dimension;
• wherein the via is in a plane orthogonal to the vertical dimension and has a first pair of sidewalls sharing a first common length in the plane, a second pair of sidewalls sharing a second common length in the plane, and a third pair of sidewalls sharing a third common length in the plane, wherein the first, second, and third pairs of sidewalls are parallel with each other in the plane and each extend from a sidewall of the via to another sidewall of the via in the plane, and wherein the first common length is less than the second common length, which is less than the third common length.