US 12,224,245 B2 · Embedded die architecture and method of making

Abstract

Various examples provide a semiconductor package. The semiconductor package includes a substrate having first and second opposed substantially planar major surfaces extending in an x-y direction. The package further includes a bridge die having third and fourth opposed substantially planar major surfaces extending in the x-y direction. The third substantially planar major surface of the bridge die is in direct contact with the second substantially planar major surface of the substrate. The semiconductor package further includes a through silicon via extending in a z-direction through the first substantially planar major surface of the substrate and the fourth substantially planar major surface of the bridge die. The semiconductor package further includes a power source coupled to the through silicon via, a first electronic component electronically coupled to the bridge die, and a second electronic component electronically coupled to the bridge die. The semiconductor package further includes an overmold at least partially encasing the first electronic component, second electronic component, and the bridge die.

Claims22

Dependent claims

A semiconductor package, comprising:

a core comprising a glass;
a substrate, comprising:
embedded components comprising one or more semiconductor materials, and one or more insulating layers;
a first die comprising a plurality of vias extending from one surface of the first die to an opposite surface of the first die, wherein a first portion of the substrate is between the core and the first die, and the core is between a second portion of the substrate and the first portion of the substrate;
a second die over a first portion of the first die and coupled to a first via of the plurality of vias of the first die;
a third die over a second portion of the first die and coupled to a second via of the plurality of vias of the first die;
a third via extending through an entire thickness of the core and an entire thickness of the substrate;
and
a fourth via extending through the entire thickness of the core and the entire thickness of the substrate,
wherein the third via is coupled to the first via, and the fourth via is coupled to the second via.

7 more elements

A semiconductor package, comprising:

a package substrate structure, comprising:
a substrate comprising a semiconductor material and layers that include one or more electrically conductive materials, wherein the layers are embedded in the semiconductor material,
a glass layer between a first portion of the substrate and a second portion of the substrate, and
a dielectric layer, wherein the first portion of the substrate is between the glass layer and the dielectric layer;
a die embedded in the dielectric layer of the package substrate structure;
an electrically continuous conductive pathway extending through the die and the substrate of the package substrate structure in a direction substantially perpendicular to the substrate of the package substrate structure;
a first electronic component coupled to the die and partially overlapping with a first portion of the die;
and
a second electronic component coupled to the die and partially overlapping with a second portion of the die.

6 more elements

Dependencies are inferred from the claim text.

Embedded die architecture and method of making

Life of this patent

Embedded die architecture and method of making

Life of this patent

Abstract

Claims22