Semiconductor memory device and manufacturing method thereof

A method of manufacturing a semiconductor memory device, comprising:

• providing a substrate having a plurality of active areas;
• forming a plurality of bit line structures on the substrate, wherein the plurality of bit line structures are sequentially provided at intervals along a first direction;
• forming a dielectric layer on the substrate, wherein the dielectric layer fills up at least a gap between adjacent bit line structures;
• etching the dielectric layer, to form a plurality of contact holes and a plurality of isolation structures, wherein each contact hole is between the adjacent bit line structures, the plurality of contact holes and the plurality of isolation structures are alternately provided along a second direction, the first direction is not parallel to the second direction, and a bottom of the contact hole exposes the active area;
• forming an isolation layer on a side wall of each bit line structure and a side wall of each isolation structure;
• and
• forming the isolation layer on a top of each bit line structure and a top of each isolation structure.