Semiconductor memory device and memory system performing error correction operation

A memory system comprising:

• a semiconductor memory device;
• and
• a memory controller configured to control the semiconductor memory device,
• wherein the semiconductor memory device is configured to:
• generate a selection address so that an error correction operation for a counting address or a target error correction operation for a target address is selectively executed in response to a control signal that is provided by the memory controller, and
• generate the target address when an error corrected through the error correction operation is a target error having a predetermined pattern that occurred previously in the error correction operation and which is indicative of a problem in an operation of the semiconductor memory device.

A method of executing an error correction operation, comprising:

• transmitting a control signal from a memory controller to a semiconductor memory device in order to execute an error correction operation;
• selecting, as a target address, an address in which a corrected error has occurred when the error, which is corrected through the error correction operation executed by the semiconductor memory device, has a predetermined pattern that occurred previously in the error correction operation and which is indicative of a problem in an operation of the semiconductor memory device;
• and
• executing a target error correction operation on the target address after the error correction operation is executed for a predetermined number of times.