All level coarse/fine programming of memory cells
AssigneeMicron Technology, Inc.
InventorsLawrence Celso Miranda, Tomoko Ogura Iwasaki, Sheyang Ning, Jeffrey S. McNeil
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AssigneeMicron Technology, Inc.
InventorsLawrence Celso Miranda, Tomoko Ogura Iwasaki, Sheyang Ning, Jeffrey S. McNeil
Estimating the term…
Described are systems and methods for all level coarse/fine programming of memory cells. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; and a controller coupled to the memory array, the controller to perform operations comprising: identifying a set of memory cells for performing a memory programming operation, wherein the memory cells are electrically coupled to a target wordline and a set of target bitlines; causing a first voltage to be applied to the target wordline, wherein the first voltage is incremented every time period over a number of time periods that corresponds to a number of threshold voltages to be programmed; causing a second voltage to be applied to a first bitline over the number of time periods; causing a third voltage to be applied to a second bitline, wherein the third voltage is incremented during a second time period of the number of time periods, wherein the second time period follows a first time period; causing a fourth voltage to be applied to a third bitline, wherein the fourth voltage is incremented during a third time period of the number of time periods, wherein the third time period follows the second time period; and causing a fifth voltage to be applied to a fourth bitline over the number of time periods.
A system, comprising:
A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a controller managing a memory array comprising a plurality of memory cells, cause the controller to perform operations, comprising:
A method, comprising:
Dependencies are inferred from the claim text.