Non-volatile static random access memory

A non-volatile static random access memory, comprising:

• a static random access memory comprising a first inverter, a second inverter and two transistors, an output terminal of the first inverter and an input terminal of the second inverter are electrically connected to each other to serve as a Q node, an input terminal of the first inverter and an output terminal of the second inverter are electrically connected to each other to serve as a QB node, and the two transistors are electrically connected to the Q node and the QB node, respectively;
• a reading element electrically connected to the Q node, wherein the reading element comprises a first reading transistor and a second reading transistor, a gate electrode of the first reading transistor is electrically connected to the Q node, a source electrode of the second reading transistor is electrically connected to a drain electrode of the first reading transistor, a gate electrode of the second reading transistor is electrically connected to a read word line, and a drain electrode of the second reading transistor is electrically connected to a read bit line;
• and
• a first embedded non-volatile memory electrically connected to the QB node.