Semiconductor storage apparatus

A semiconductor storage apparatus, comprising:

• a plurality of memory cells divided into a plurality of groups, wherein
• each memory cell of the plurality of memory cells comprises:
• a magnetization reversal memory device;
• and
• a first switch device configured to control a current to flow to the magnetization reversal memory device;
• a plurality of wiring lines for each group of the plurality of groups, wherein
• each wiring line of the plurality of wiring lines is coupled to the first switch device of a corresponding memory cell of the plurality of memory cells;
• a plurality of second switch devices for each wiring line of the plurality of wiring lines;
• and
• a control circuit configured to:
• perform a writing control, based on an asymmetric property of a writing error rate curve line with respect to a writing voltage of the magnetization reversal memory device, wherein
• the writing control is performed with Wa and Wb,
• the Wa and the Wb are different based on an ON period of the first switch device,
• the Wa is a pulse width upon a write operation of a first state to the magnetization reversal memory device,
• the Wb is a pulse width upon a write operation of a second state to the magnetization reversal memory device, and
• the plurality of second switch devices is configured to control a supply, to the plurality of wiring lines, of a voltage to use upon the write operation of the second state to the magnetization reversal memory device.