Display driving integrated circuit configured to perform adaptive frame operation and operation method thereof

An operation method of a display driving integrated circuit which performs an adaptive frame operation that adapts for frame delays in a given frame rate, the operation method comprising:

• sequentially receiving a plurality of frame data from an external device in the given frame rate, and sequentially outputting the plurality of frame data to an external display panel in the given frame rate;
• receiving first frame data from the external device, the first frame data being delayed with respect the given frame rate;
• generating an internal vertical synchronization signal in response to an external vertical synchronization signal received from the external device;
• and
• outputting the first frame data to the external display panel in response to the internal vertical synchronization signal,
• wherein the display driving integrated circuit is provided an emission control signal corresponding to target luminance of the external display panel,
• wherein the display driving integrated circuit controls the emission control signal such that the emission control signal has a first level between a second time point and a third time point and has a second level different from the first level between the third time point and a fourth time point
• wherein a first time point is when previous frame data are completely output, the second time point is when a vertical front porch (VFP) beginning at the first time point passes, the third time point is a time point when starting to receive the first frame data, and the fourth time point is when the internal vertical synchronization signal is generated,
• wherein the first level is determined based on a target duty ratio corresponding to the target luminance of the external display panel, and
• wherein the display driving integrated circuit communicates with the external device in a video mode supported by a mobile industry processor interface (MIPI) D-Phy physical layer.

A display driving integrated circuit comprising:

• an interface circuit configured to receive first frame data from an external device, the first frame data being delayed with respect to a given frame rate;
• a timing controller configured to generate an internal vertical synchronization signal in response to an external vertical synchronization signal received from the external device;
• a source driver configured to output the first frame data to an external display panel in response to the internal vertical synchronization signal;
• and
• an emission control driver configured to output an emission control signal corresponding to target luminance,
• wherein the emission control driver is further configured to control the emission control signal such that the emission control signal has a first level between a second time point and a third time point and has a second level different from the first level between the third time point and a fourth time point,
• wherein a first time point is when previous frame data are completely output, the second time point is when a vertical front porch (VFP) beginning at the first time point passes, the third time point is a time point when starting to receive the first frame data, and the fourth time point is when the internal vertical synchronization signal is generated,
• wherein the first level is determined based on a target duty ratio corresponding to the target luminance of the external display panel, and
• wherein the display driving integrated circuit communicates with the external device in a video mode supported by a mobile industry processor interface (MIPI) D-Phy physical layer.