Pixel and gate driving circuit

A pixel comprising:

• a light-emitting diode;
• a first transistor;
• a second transistor connected to a gate of the first transistor and to a data line;
• a third transistor connected to the gate of the first transistor and to a first voltage line;
• a fourth transistor connected to the first transistor and to a second voltage line;
• a fifth transistor connected to the first transistor and to a third voltage line;
• a sixth transistor connected to the first transistor and to the light-emitting diode;
• a seventh transistor connected to the first transistor and to the third voltage line;
• and
• an eighth transistor connected to the first transistor and to a fourth voltage line,
• wherein a gate signal supplied to a gate of the fifth transistor and a gate signal supplied to a gate of the sixth transistor are the same, and
• a gate signal supplied to a gate of the fourth transistor and a gate signal supplied to a gate of the eighth transistor are the same.

A gate driving circuit for outputting gate signals to a plurality of pixels connected to a first gate line, a second gate line, a third gate line, a fourth gate line, and a fifth gate line, the gate driving circuit comprising:

• a first driving circuit configured to output a first gate signal sequentially to the first gate line in a first row and to the first gate line in a second row immediately adjacent to the first row;
• a second driving circuit configured to output a fourth gate signal simultaneously to the fourth gate line in the first row and to the fourth gate line in the second row;
• and
• a third driving circuit configured to output a third gate signal simultaneously to the third gate line in the first row and to the third gate line in the second row,
• wherein the fourth gate signal output by the second driving circuit is supplied to the fifth gate line in a third row,
• the first gate signal output by the first driving circuit or the third gate signal output by the third driving circuit is supplied to the second gate line in a fourth row, and
• the third row and the fourth row are rows spaced apart from the first row by two or more rows.

A gate driving circuit for outputting gate signals to a plurality of pixels connected to a first gate line, a second gate line, a third gate line, a fourth gate line, and a fifth gate line, the gate driving circuit comprising:

• a first driving circuit configured to output a first gate signal sequentially to the first gate line in a first row and to the first gate line in a second row immediately adjacent to the first row;
• a second driving circuit configured to output a fourth gate signal simultaneously to the fourth gate line in the first row and to the fourth gate line in the second row;
• a third driving circuit configured to output a third gate signal simultaneously to the third gate line in the first row and to the third gate line in the second row;
• and
• a fourth driving circuit configured to output the second gate signal simultaneously to the second gate line in the first row and to the second gate line in the second row,
• wherein the fourth gate signal output by the second driving circuit is supplied to the fifth gate line in the first row or the fifth gate line in a third row.