Display substrate, display panel and display device

A display substrate, comprising:

• a base substrate;
• a first semiconductor layer disposed on the base substrate;
• a first conductive layer disposed on a side of the first semiconductor layer away from the base substrate;
• and
• a second conductive layer disposed on a side of the first conductive layer away from the base substrate,
• wherein the display substrate further comprises a pixel driving circuit disposed on the base substrate, the pixel driving circuit comprises a driving circuit, a storage circuit and a reset circuit, wherein the reset circuit is electrically connected to a first terminal of the driving circuit or a second terminal of the driving circuit, and is configured to initialize a potential at the first terminal of the driving circuit or a potential at the second terminal of the driving circuit in an initialization stage;
• the driving circuit is configured to conduct a path between the first terminal of the driving circuit and the second terminal of the driving circuit under control of a potential at a control terminal of the driving circuit;
• and the storage circuit is electrically connected to the control terminal of the driving circuit and is configured to store electrical energy;
• and
• wherein the reset circuit comprises a first capacitor, the storage circuit comprises a second capacitor, the first capacitor comprises a first electrode plate and a second electrode plate disposed opposite to the first electrode plate, the second capacitor comprises a first electrode plate and a second electrode plate disposed opposite to the first electrode plate, the first electrode plate of the first capacitor and the first electrode plate of the second capacitor are located in the first conductive layer, and the second electrode plate of the first capacitor and the second electrode plate of the second capacitor are located in the second conductive layer;
• an orthographic projection of the first electrode plate of the first capacitor on the base substrate and an orthographic projection of the first electrode plate of the second capacitor are spaced from each other on the base substrate, an orthographic projection of the second electrode plate of the first capacitor on the base substrate and an orthographic projection of the second electrode plate of the second capacitor are spaced from each other on the base substrate, the orthographic projection of the first electrode plate of the first capacitor on the base substrate at least partially overlaps with the orthographic projection of the second electrode plate of the first capacitor on the base substrate, and the orthographic projection of the first electrode plate of the second capacitor on the base substrate at least partially overlaps with the orthographic projection of the second electrode plate of the second capacitor on the base substrate, wherein an area of the overlap between the orthographic projection of the first electrode plate of the first capacitor on the base substrate and the orthographic projection of the second electrode plate of the first capacitor on the base substrate is smaller than an area of the overlap between the orthographic projection of the first electrode plate of the second capacitor on the base substrate and the orthographic projection of the second electrode plate of the second capacitor on the base substrate, and a ratio of the area of the overlap between the orthographic projection of the first electrode plate of the second capacitor on the base substrate and the orthographic projection of the second electrode plate of the second capacitor on the base substrate to the area of the overlap between the orthographic projection of the first electrode plate of the first capacitor on the base substrate and the orthographic projection of the second electrode plate of the first capacitor on the base substrate is within a range of 5 to 20.