Pixel circuit optimizing a current flow and display apparatus comprising the pixel circuit

A display apparatus including a pixel circuit, wherein the pixel circuit comprises:

• a capacitor connected between a first node and a second node;
• a first transistor connected to a data line and the first node;
• a driving transistor including a gate electrode connected to the second node, a first electrode connected to a first voltage supply line, and a second electrode connected to a third node;
• a second transistor connected between the second node and a fourth node;
• a third transistor connected between the fourth node and a fifth node, the fourth node being connected to a reference voltage supply line;
• a fourth transistor connected between the third node and the fifth node;
• a fifth transistor connected between the second node and the third node;
• a sixth transistor connected between the first node and the reference voltage supply line;
• and
• an emission element connected between the fifth node and a second voltage supply line,
• wherein:
• a first scan signal for being applied with the first transistor is different from a second scan signal for being applied with the fifth transistor;
• the fourth transistor is for being applied with a (n−1)th emission signal from a second emission signal line;
• the sixth transistor is for being applied with a (n)th emission signal from a first emission signal line;
• and
• a turn-off time of the sixth transistor is delayed than a turn-off time of the fourth transistor.