A set of processors corresponding to two or more different processor types in a family of processor types, the different processor types in said family of processor types including different numbers of multiplication units, wherein the processors in the set of processors are configured for executing a common instruction set including a plurality of multiplication types, wherein using a specific processor in the set of processors to execute a specific instruction from the common instruction set defining a multiplication type includes using multiplication units corresponding to the specific processor to perform multiplications for a number of cycles corresponding to a number of multiplication cycles, wherein the number of multiplication cycles is derived at least in part by processing cardinality information of the multiplication units of the specific processor and the multiplication type defined by the specific instruction.