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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKumar Lalgudi, Ranjith Kumar, Mohammed Rabiul Islam, Jianyang Xu
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A method of forming an integrated circuit structure is provided. The method includes: providing a logic cell structure including a first input node, a second input node, and a pulling network connected to a reference voltage and an output node, wherein the pulling network includes a plurality of transistor segments; determining a delay associated with at least one of the first input node and the second input node; and connecting the plurality of transistor segments to the first input node, the second input node and the output node based at least in part on the determined delay.
A method of making an integrated circuit structure, the method comprising:
A non-transitory computer-readable storage medium comprising executable instructions that, when executed, causes a processor to perform a method comprising:
A method of making an integrated circuit structure, the method comprising:
Dependencies are inferred from the claim text.