Far memory direct caching
AssigneeLenovo Global Technology (United States) Inc.
InventorJonathan Hinkle
Life of this patent
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Abstract
A far memory device includes a far memory controller, a memory device coupled to the controller, a first port coupled to the far memory controller to support communication with a host processor over a first serial computer expansion bus, and a second port coupled to the far memory controller to support communication with a non-volatile data storage drive over a second serial computer expansion bus. The far memory device serves as a cache between the host processor and the non-volatile data storage drive and may perform aspects of cache management on behalf of the host processor.
Claims20
An apparatus, comprising:
- a dual-ported far memory device including a far memory controller, one or more memory devices coupled to the far memory controller, a first external port coupled to the far memory controller to support communication with a host processor over a first serial computer expansion bus, a second external port coupled to the far memory controller to support communication with a non-volatile data storage drive over a second serial computer expansion bus, and at least one non-transitory storage device storing program instructions, wherein the far memory controller includes at least one processor configured to process the program instructions, and wherein the program instructions are configured to, when processed by the at least one processor, cause the processor to perform operations comprising:
- receiving, from the host processor over the first serial computer expansion bus, a first write instruction, data to be written to the one or more memory devices, an identity of a namespace and a logic block within the namespace that are associated with the data, and a memory address range associated with the namespace and logic block;
- writing the data to the one or more memory devices at the memory address range;
- storing, for the data written to the one or more memory devices, the namespace and the logic block within the namespace in association with the memory address range;
- marking the logic block within the namespace as being dirty in response to writing the data to the one or more memory devices;
- and
- sending a second write instruction to the non-volatile data storage drive over the second serial computer expansion bus, wherein the second write instruction includes the data associated with the logic block marked as being dirty and the identity of the namespace and the logic block within the namespace where the data is to be stored on the non-volatile data storage drive.
A computer program product comprising a non-volatile computer readable medium and non-transitory program instructions embodied therein, the non-transitory program instructions being configured to be executable by a processor of a far memory controller in a dual-ported far memory device to cause the processor to perform operations comprising:
- receiving, from a host processor over a first serial computer expansion bus coupled to a first external port of the far memory device, a first write instruction, data to be written to one or more memory devices, an identity of a namespace and a logic block within the namespace that are associated with the data, and a memory address range associated with the namespace and logic block;
- writing the data to the one or more memory devices at the memory address range;
- storing, for the data written to the one or more memory devices, the namespace and the logic block within the namespace in association with the memory address range;
- marking the logic block within the namespace as being dirty in response to writing the data to the one or more memory devices;
- and
- sending a second write instruction to a non-volatile data storage drive over a second serial computer expansion bus coupled to a second external port of the far memory device, wherein the second write instruction includes the data associated with the logic block marked as being dirty and the identity of the namespace and the logic block within the namespace where the data is to be stored on the non-volatile data storage drive.
A computer program product comprising a non-volatile computer readable medium and non-transitory program instructions embodied therein, the non-transitory program instructions being configured to be executable by a processor to cause the processor to perform operations comprising:
- identifying an address of particular data to be read;
- determining whether the particular data is stored in a dual-ported far memory device accessible over a first serial computer expansion bus coupled to a first external port of the dual-ported far memory device or stored in a dual-ported non-volatile data storage drive accessible over a second serial computer expansion bus coupled to a first external port of the dual-ported non-volatile data storage drive, wherein a second external port of the dual-ported far memory device is coupled to a second external port of the dual-ported non-volatile data storage drive via a third serial computer expansion bus for saving data from the dual-ported far memory device to the dual-ported non-volatile data storage drive;
- reading the particular data from the far memory device over the first serial computer expansion bus in response to determining that the particular data is stored on the far memory device;
- and
- reading the particular data directly from the non-volatile data storage drive over the second serial computer expansion bus in response to determining that the particular data is not stored on the far memory device.
Dependencies are inferred from the claim text.