Memory controller and method for controlling output of debug messages
AssigneeSilicon Motion, Inc.
InventorsHong-Ren Fang, Hao-Hsuan Wang
Life of this patent
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AssigneeSilicon Motion, Inc.
InventorsHong-Ren Fang, Hao-Hsuan Wang
Estimating the term…
A memory controller coupled to a memory device for accessing the memory device and includes a Universal Asynchronous Receiver/Transmitter (UART) and a microprocessor. The microprocessor is coupled to the UART and configured to control access operations of the memory device. The microprocessor is configured to perform an interrupt service routine in response to an interrupt. When performing the interrupt service routine, the microprocessor is configured to determine whether a predetermined signal has been received by a specific pin and when determining that the predetermined signal has been received by the specific pin, the microprocessor is configured to output a debug message through a transmitting terminal of the UART.
A memory controller, coupled to a memory device for accessing the memory device, comprising:
A method for controlling output of debug messages, for a data storage device coupled to a host device, wherein the host device issues commands to the data storage device to access the data storage device, the method for controlling output of debug messages is performed by a memory controller of the data storage device when the host device determines that an error has occurred in the data storage device and comprises:
Dependencies are inferred from the claim text.