Memory module with dedicated repair devices

A method of operation in a memory device, the method comprising:

• receiving a command for executing a first access operation;
• and
• accessing, in response to the command, storage locations dedicated to store failure address information associated with defective storage locations in a second memory device, the accessing at least partially overlapping a second access operation directed to the defective storage locations of the second memory device.

An integrated circuit (IC) dynamic random access memory (DRAM) chip, comprising:

• an array of storage locations dedicated to store failure address information associated with defective storage locations in a second IC DRAM chip, the failure address information accessible during a first access operation that at least partially overlaps a second access operation directed to the defective storage locations of the second IC DRAM chip;
• and
• interface circuitry coupled to a memory repair circuit to receive a command for executing the first access operation.