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US 12,222,803 B2Granted
Intra-controllers for error correction code
AssigneeMicron Technology, Inc.
InventorsMarco Sforzin, John D. Porter
Life of this patent
Estimating the term…
Abstract
An on-die controller can provide an error correction capability for data stored in an array of memory cells located on the same die as the on-die controller. The error correction capability provided by the on-die controller eliminates a need to transfer error correction code (ECC) data to an external controller that may have provided the error correction capability in lieu of the on-die controller, which can provide more channel bandwidth for other types of non-user data for further strengthening data reliability, security, integrity of the memory system.
Claims20
An apparatus, comprising:
- a plurality of memory units, each memory unit of the plurality of memory units further comprising:
- a respective array of memory cells configured to store:
- a respective portion of one or more user data blocks (UDBs);
- and
- auxiliary data corresponding to the respective portion of the one or more UDBs, wherein a first portion of the auxiliary data comprises error correction information corresponding to the respective portion of the one or more UDBs;
- and
- a respective intra-controller configured to, in response to receipt of a command to access the respective portion of the one or more UDBs:
- perform an error correction operation on the respective portion of the one or more UDBs using the error correction information to correct one or more bit errors on the respective portion of the one or more UDBs;
- and
- exchange, subsequent to performance of the error correction operation and via one or more data pins of the respective memory unit, the respective portion of the one or more UDBs and a second portion of the auxiliary from the respective memory unit.
7 more elements
A method, comprising:
- performing, using first error correction information and prior to exchanging a respective portion of one or more user data blocks (UDBs) at a respective memory unit of a plurality of memory units, an error correction operation on the respective portion of one or more UDBs to correct one or more bit errors on the respective portion of one or more UDBs, wherein each memory unit of the plurality of memory units is configured to store:
- the respective portion of one or more UDBs;
- and
- auxiliary data comprising the first error correction information and error detection information to indicate one or more bit errors in the one or more UDBs;
- and
- exchanging the respective portion of one or more UDBs and a portion of the auxiliary data including the error detection information subsequent to performing the error correction operation.
3 more elements
An apparatus, comprising:
- a plurality of memory units configured to store error detection information corresponding to one or more user data blocks (UDBs), each memory unit of the plurality of memory units comprising:
- an array of memory cells configured to store:
- a respective portion of the one or more UDBs;
- and
- auxiliary data including respective first error correction information and a respective portion of the error detection information;
- and
- an intra-controller configured to generate the respective first error correction information based on the respective portion of the one or more UDBs;
- and
- a memory controller communicatively coupled to the plurality of memory units, the memory controller configured to cause a respective intra-controller of the plurality of respective intra-controllers of a first memory device of the plurality of memory devices to, in response to receipt of a host read command to access the first memory device:
- perform, using the respective first error correction information, an error correction operation on the respective portion of the one or more UDBs;
- and
- transfer, subsequent to the performance of the error correction operation, the respective portion of the one or more UDBs and the auxiliary data including the error detection information to the memory controller.
9 more elements
Dependencies are inferred from the claim text.