Methods of fabricating semiconductor devices having gate-all-around structure with inner spacer last process

A semiconductor device, comprising:

• a plurality of first channel layers stacked over a semiconductor substrate and spaced apart from one another;
• a source/drain structure laterally adjacent to the plurality of first channel layers;
• a gate structure wrapping around the plurality of first channel layers;
• and
• a plurality of first doped portions sandwiched between the plurality of first channel layers and the source/drain structure;
• a second doped portion below the source/drain structure, wherein the plurality of first doped portions vertically overlaps the second doped portion;
• and
• a plurality of second channel layers stacked over the semiconductor substrate and spaced apart from one another, wherein the second doped portion is sandwiched between and in direct contact with a bottommost one of the first channel layers and a bottommost one of the second channel layers.

A semiconductor device, comprising:

• a fin protruding from a semiconductor substrate;
• an isolation structure surrounding the fin;
• a plurality of channel layers separated from each other and disposed over the fin, wherein the channel layers are made of a first semiconductor material, and portions of the channel layers are implanted with a dopant, and the dopant comprises carbon, germanium or a combination thereof;
• a gate structure filling spaces between the channel layers and surrounding the channel layers;
• epitaxial source and drain structures disposed on opposite sides of the gate structure;
• a doped semiconductor layer below one of the epitaxial source and drain structures, wherein a first channel layer is a bottommost one of the plurality of channel layers, a top surface and a bottom surface of the doped semiconductor layer are substantially leveled with a top surface and a bottom surface of the first channel layer, respectively;
• and
• a plurality of inner spacers disposed between the gate structure and the epitaxial source and drain structures, wherein the inner spacers vertically overlap the doped semiconductor layer.