Method for manufacturing semiconductor devices having gate spacers with bottom portions recessed in a fin

A method, comprising:

• forming first and second fin structures on a substrate;
• forming first and second polysilicon structures on the first and second fin structures, respectively;
• forming a first gate spacer comprising a first spacer portion along a sidewall of the first polysilicon structure and a second spacer portion along a fin sidewall of the first fin structure;
• forming, at a same time as forming the first gate spacer, a second gate spacer comprising a third spacer portion along a sidewall of the second polysilicon structure and a fourth spacer portion along a fin sidewall of the second fin structure, wherein a height of the second spacer portion is greater than a height of the fourth spacer portion;
• forming a first source/drain (S/D) region adjacent to the first gate spacer;
• forming a second S/D region adjacent to the second gate spacer;
• and
• replacing the first and second polysilicon structures with first and second gate structures.

A method, comprising:

• forming a fin structure on a substrate;
• forming a spacer opening, in the fin structure, comprising etching the fin structure with a fluorine-based etching gas in a gas mixture comprising chlorine, hydrogen bromide, and helium, wherein a ratio of the fluorine-based etching gas to the gas mixture is about 1:10 to about 1:25;
• forming a spacer along a sidewall of the fin structure and in the spacer opening;
• and
• forming a source/drain (S/D) region comprising a first S/D portion along a sidewall of the spacer and a second S/D portion along a sidewall of the fin structure, wherein entire sidewalls of the second S/D portion are substantially vertical.