2D-channel transistor structure with source-drain engineering

A semiconductor device, comprising:

• a plurality of semiconductor layers disposed on a substrate, vertically stacked and distanced from each other;
• a plurality of two-dimensional (2D) material layers disposed on a top surface and a bottom surface of each of the plurality of semiconductor layers, respectively;
• a source feature and a drain feature electrically connected to the each of the plurality of semiconductor layers and each of the plurality of 2D material layers, wherein the source feature and drain feature include a semiconductor material;
• and
• a gate structure over the substrate and extending to wrap around the each of the plurality of semiconductor layers and the each of the plurality of 2D material layers.

A method, comprising:

• providing a workpiece having a semiconductor structure;
• depositing a two-dimensional (2D) material layer over the semiconductor structure;
• patterning the semiconductor structure to form trenches in source/drain regions;
• epitaxially growing a semiconductor material to fill in the trenches, thereby forming a source feature and a drain feature, wherein the source feature and the drain feature are electrically connected to the semiconductor structure and the 2D material layer, and wherein the source feature and drain feature include a semiconductor material;
• and
• forming a gate structure over the two-dimensional material layer and interposed between the source feature and the drain feature, wherein the gate structure, the source feature, the drain feature, the semiconductor structure and the 2D material layer are configured to form a field-effect transistor, and wherein the semiconductor structure and the 2D material layer function, respectively, as a first channel and a second channel between the source feature and the drain feature.