False collectors and guard rings for semiconductor devices

A method of fabricating an integrated circuit, comprising:

• implanting dopant of a first conductivity type into a semiconductor substrate to form a first buried layer;
• forming an epitaxial layer of a second conductivity type on the semiconductor substrate over the first buried layer, the second conductivity type being opposite the first conductivity type;
• forming a deep trench isolation sidewall of the first conductivity type over the semiconductor substrate;
• forming an oxide layer over the epitaxial layer;
• implanting dopant of the second conductivity type into the epitaxial layer to form a second buried layer;
• implanting dopant of the second conductivity type into the epitaxial layer above the second buried layer to form a deep region that is adjacent to the second buried layer and between the oxide layer and the second buried layer;
• implanting dopant of the first conductivity type into the epitaxial layer above the second buried layer to form a collector region, the collector region located laterally from the deep region and extending from a surface of the epitaxial layer to terminate at a location spaced from the second buried layer;
• implanting dopant of the second conductivity type into the epitaxial layer above the second buried layer to form first, second, and third shallow well regions, the third shallow well region located laterally between the first and second shallow well regions, the third shallow well region formed over the deep region;
• implanting dopant of the first conductivity type into the epitaxial layer to form first and second false collector regions adjacent to the surface of the epitaxial layer, the first false collector region being located laterally between the first shallow well region and the third shallow well region, and the second false collector region being located laterally between the third shallow well region and the second shallow well region;
• and
• implanting dopant of the second conductivity type into the epitaxial layer to form a base region extending between the third shallow well region and the surface of the epitaxial layer, the base region forming a base of a bipolar junction of a lateral isolation region, the collector region forming a collector of the bipolar junction, and the deep trench isolation sidewall forming an emitter of the bipolar junction.

A method, comprising:

• forming a trench isolation sidewall of a first conductivity type in a semiconductor layer of a second conductivity type, wherein the trench isolation sidewall forms an emitter of a bipolar junction of an isolation region;
• implanting dopant of the first conductivity type into the semiconductor layer to form a collector region located laterally away from the trench isolation sidewall, wherein the collector region forms a collector of the bipolar junction;
• implanting dopant of the first conductivity type into the semiconductor layer to form first and second false collector regions, the first and second false collector regions being separated from each other and located laterally between the collector region and the trench isolation sidewall, wherein the first false collector region is located laterally closer to the collector region than the second false collector region;
• and
• implanting dopant of the second conductivity type into the semiconductor layer to form a base region that forms a base of the bipolar junction, wherein the base region is located between the first and second false collector regions.