Low-noise image sensor having stacked semiconductor substrates

A method for forming an image sensor, the method comprising:

• forming a first photodetector, a second photodetector, a third photodetector, and a fourth photodetector in a first semiconductor substrate;
• forming a first floating diffusion node, a second floating diffusion node, a third floating diffusion node, and a fourth floating diffusion node in the first semiconductor substrate, wherein the first, second, third, and fourth floating diffusion nodes respectively correspond to the first, second, third, and fourth photodetectors;
• depositing a first interlayer dielectric (ILD) layer over the first semiconductor substrate;
• bonding a second semiconductor substrate to the first semiconductor substrate, such that the first ILD layer is disposed vertically between the second semiconductor substrate and the first semiconductor substrate;
• forming a first isolation structure in the second semiconductor substrate;
• forming a gate electrode of a readout transistor over the second semiconductor substrate;
• forming a pair of source/drain (S/D) regions of the readout transistor in the second semiconductor substrate, wherein the S/D regions of the pair of S/D regions are formed on opposite sides of the gate electrode;
• forming a second ILD layer over the first isolation structure, the second semiconductor substrate, and the gate electrode;
• forming a first conductive contact in the second ILD layer, the first isolation structure, and the first ILD layer, wherein the first conductive contact is formed overlying and extending vertically from the first floating diffusion node;
• forming a second conductive contact in the second ILD layer, the first isolation structure, and the first ILD layer, wherein the second conductive contact is formed overlying and extending vertically from the second floating diffusion node;
• forming a third conductive contact in the second ILD layer, the first isolation structure, and the first ILD layer, wherein the third conductive contact is formed overlying and extending vertically from the third floating diffusion node;
• forming a fourth conductive contact in the second ILD layer, the first isolation structure, and the first ILD layer, wherein the fourth conductive contact is formed overlying and extending vertically from the fourth floating diffusion node;
• forming a fifth conductive contact in the second ILD layer, wherein the fifth conductive contact is formed overlying and extending vertically from a first S/D region of the pair of S/D regions;
• depositing a third ILD layer over the first, second, third, fourth, and fifth conductive contacts and over the second ILD layer;
• forming a conductive line trench in the third ILD layer, wherein the conductive line trench exposes the first, second, third, fourth, and fifth conductive contacts, and wherein the conductive line trench is formed extending laterally around at least three sidewalls of the gate electrode;
• and
• filling the conductive line trench with a conductive material, thereby forming a conductive line in the conductive line trench and that is electrically coupled to the first, second, third, fourth, and fifth conductive contacts.

A method for forming an image sensor, the method comprising:

• forming a first photodetector, a second photodetector, a third photodetector, and a fourth photodetector in a first semiconductor substrate;
• forming a first interlayer dielectric (ILD) structure over the first semiconductor substrate;
• bonding a second semiconductor substrate to the first semiconductor substrate, such that the first ILD structure is disposed vertically between the second semiconductor substrate and the first semiconductor substrate;
• forming a gate electrode of a readout transistor over the second semiconductor substrate, wherein the gate electrode is formed over a first portion of an active region of the second semiconductor substrate;
• forming a pair of source/drain (S/D) regions of the readout transistor in the second semiconductor substrate, wherein the pair of S/D regions comprises a first S/D region and a second S/D region that are laterally spaced in a first direction, and wherein the first S/D region and the second S/D region are formed on opposite sides of the gate electrode;
• forming a second ILD structure over the second semiconductor substrate and the gate electrode;
• forming a first conductive contact in the second ILD structure, wherein the first conductive contact is formed overlying and extending vertically from the first S/D region;
• forming a second conductive contact in the second ILD structure, wherein the second conductive contact is formed overlying and extending vertically from the second S/D region;
• forming a third conductive contact in the second ILD structure, wherein the third conductive contact is formed overlying and extending vertically from a second portion of the active region of the second semiconductor substrate, wherein a third portion of the active region extends laterally from the first portion of the active region to the second portion of the active region in a second direction that is perpendicular to the first direction;
• and
• forming an isolation structure in the first semiconductor substrate and laterally surrounding the first, second, third, and fourth photodetectors, wherein the isolation structure is formed with a first portion that extends laterally through the first semiconductor substrate in the first direction, wherein the isolation structure is formed with a second portion that extends laterally through the first semiconductor substrate in the second direction, wherein the first portion of the isolation structure intersects the second portion of the isolation structure at an intersection portion of the isolation structure, wherein the isolation structure is formed so that the third conductive contact at least partially overlies the second portion of the isolation structure.