Structure and method for gate-all-around metal-oxide-semiconductor devices with improved channel configurations

A semiconductor structure, comprising:

• a base fin arising from a substrate and extending lengthwise along a direction;
• a plurality of nanostructures disposed over the base fin;
• a metal gate structure wrapping around each of the plurality of nanostructures;
• a dielectric gate structure disposed over and partially extending into the base fin;
• and
• a source/drain feature disposed between the metal gate structure and the dielectric gate structure along the direction,
• wherein the dielectric gate structure is spaced apart from the source/drain feature by a stack of semiconductor layers interleaved by a stack of inner spacer features.

A semiconductor structure, comprising:

• a base fin arising from a substrate and extending lengthwise along a first direction;
• a plurality of nanostructures disposed over the base fin;
• a metal gate structure wrapping around each of the plurality of nanostructures and extending lengthwise along a second direction perpendicular to the first direction;
• a pair of gate end dielectric layers sandwiching the metal gate structure along the second direction;
• a dielectric gate structure disposed over the base fin;
• and
• a source/drain feature disposed between the metal gate structure and the dielectric gate structure along the first direction;
• and
• a source/drain contact over the source/drain feature,
• wherein, along the first direction, the dielectric gate structure is spaced apart from the source/drain contact by a gate spacer,
• wherein, along the first direction, the dielectric gate structure is spaced apart from the source/drain feature by a stack of semiconductor layers interleaved by a stack of inner spacer features.