Radiation hardened semiconductor devices and packaging
AssigneeMicron Technology, Inc.
InventorChong Leong Gan
Life of this patent
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Abstract
Radiation hard semiconductor devices and packaging are disclosed. A semiconductor device assembly includes a substrate, a semiconductor die stack electrically coupled to the substrate, and an ionizing radiation shield disposed over a top die of the semiconductor die stack, wherein the ionizing radiation shield comprises silicon carbide (SiC). The semiconductor device assembly further includes an encapsulant at least partially encapsulating the semiconductor die stack and the ionizing radiation shield.
Claims20
A semiconductor device assembly comprising:
- a substrate;
- a semiconductor die stack electrically coupled to the substrate;
- an ionizing radiation shield disposed over a top die of the semiconductor die stack, wherein the ionizing radiation shield comprises silicon carbide (SiC);
- and
- an encapsulant at least partially encapsulating the semiconductor die stack and the ionizing radiation shield.
A method of producing a semiconductor device assembly comprising:
- attaching a semiconductor die stack to a substrate;
- disposing an ionizing radiation shield comprising silicon carbide (SiC) above a top die of the semiconductor die stack;
- and
- at least partially encapsulating the semiconductor die stack and the ionizing radiation shield.
A semiconductor device assembly comprising:
- a semiconductor die stack, wherein each semiconductor die of the semiconductor die stack includes a passivation layer and a first graphene layer formed on the passivation layer;
- an ionizing radiation shield positioned above the semiconductor die stack, wherein the ionizing radiation shield comprises silicon carbide (SiC);
- an encapsulant at least partially encapsulating the ionizing radiation shield and the semiconductor die stack;
- and
- a substrate electrically coupled to the semiconductor die stack, wherein the substrate includes a graphene layer positioned on a surface facing the semiconductor die stack, the graphene layer configured to provide electrical grounding for the semiconductor die stack.
Dependencies are inferred from the claim text.