DC and AC magnetic field protection for MRAM device using magnetic-field-shielding structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHarry-Hak-Lay Chuang, Tien-Wei Chiang, Kuo-An Liu, Chia-Hsiang Chen
Life of this patent
Estimating the term…
Abstract
In some embodiments, the present application provides an integrated chip. The integrated chip includes a chip comprising a semiconductor device. A shielding structure abuts the chip. The shielding structure comprises a first horizontal region adjacent to a first horizontal surface of the chip. The first horizontal region comprises a first multilayer structure comprising a first dielectric layer and two or more metal layers. The first dielectric layer is disposed between the two or more metal layers.
Claims20
An integrated chip, comprising:
- a chip comprising a semiconductor device;
- and
- a shielding structure abutting the chip, wherein the shielding structure comprises a first horizontal region adjacent to a first horizontal surface of the chip, wherein the first horizontal region comprises a first multilayer structure comprising a first dielectric layer and two or more metal layers, wherein the first dielectric layer is disposed between the two or more metal layers.
An integrated chip, comprising:
- a semiconductor structure having a first lateral surface opposite a second lateral surface and a pair of sidewalls extending between the first and second lateral surfaces;
- and
- a housing structure comprising a first lateral region, a second lateral region, and a sidewall region extending between the first and second lateral regions, wherein the semiconductor structure is spaced vertically between the first and second lateral regions, and wherein the housing structure comprises a shielding stack comprising a plurality of metal structures and an insulating structure spacing the metal structures from one another.
A method for forming an integrated chip, comprising:
- forming a first multilayer structure comprising a first metal layer and a first dielectric layer;
- trimming the first multilayer structure to meet dimensions of a first outer surface of a package structure, wherein the package structure comprises a chip;
- and
- attaching the first multilayer structure to the first outer surface of the package structure.
Dependencies are inferred from the claim text.