Package structure for heat dissipation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Sung-Feng Yeh, Ming-Fa Chen
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Abstract
A package structure and method of manufacturing is provided, whereby heat dissipating features are provided for heat dissipation. Heat dissipating features include conductive vias formed in a die stack, thermal chips, and thermal metal bulk, which can be bonded to a wafer level device. Hybrid bonding including chip to chip, chip to wafer, and wafer to wafer provides thermal conductivity without having to traverse a bonding material, such as a eutectic material. Plasma dicing the package structure can provide a smooth sidewall profile for interfacing with a thermal interface material.
Claims20
A method comprising:
- providing a structure comprising:
- a carrier wafer, and
- a first device wafer with an adhesion layer between the carrier wafer and the first device wafer;
- forming a plurality of first ablation structures in the structure, each of the plurality of first ablation structures extending through the first device wafer, the adhesion layer and a portion of the carrier wafer;
- forming a first protective layer on the structure before the plurality of first ablation structures are formed;
- and
- removing the first protective layer after the plurality of first ablation structures are formed.
A method comprising:
- providing a first structure comprising:
- a carrier wafer, and
- a first device wafer with an adhesion layer between the carrier wafer and the first device wafer;
- forming a plurality of first ablation structures in the first structure, each of the plurality of first ablation structures extending toward the first device wafer;
- and
- attaching a second structure over the first ablation structures.
A method comprising:
- providing a structure comprising:
- a carrier wafer, and
- a first device wafer with an adhesion layer between the carrier wafer and the first device wafer;
- stacking a second device wafer to the first device wafer, the second device wafer having a plurality of second dies;
- and
- forming a plurality of first ablation structures in the structure, wherein adjacent second dies are separated by one of the first ablation structures.
Dependencies are inferred from the claim text.